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Minimizing RTL Power Optimization Through Sequential Analysis: A Webinar on the Latest Techniques for Power Optimization at RTL

Analysing and optimizing power at RTL can significantly reduce power but is challenging especially when done manually. The widely used practice of inserting clock gating may not be very effectivewithout considering the sequential nature of the design and representative switching activity.

In this 50 minute webinar, Calypto will review the requirements for a comprehensive methodology to reduce power at the RTL level. We will cover basic, yet important concepts, such as how to best set up your environment to accurately measure power. The webinar will cover more advance topics such as how to analyze the RTL for wasted power and show optimization techniques to reduce power on real designs. The latest technique of sequential analyses will be described including stability based and the more difficult observability based sequential clock gating that provides maximum power optimization.

Date: Tue, Dec 4, 2012
Time: 11:00 AM PST
Duration: 1 hour
Host(s): Calypto Design Systems

Register Now! 

https://cc.callinfo.com/cc/s/showReg?udc=13un9t0i8svok


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